Prof. Ahmed Radwan

Recently, pinched hysteresis has been found in the electrical modelling of regular plant tissues. Usually, the biological tissues are characterized in the frequency domain using bio-impedance analyzers without investigating the time domain, which would show the pinched hysteresis. In this paper, the current-voltage analysis of some of the widely known electrical bio-impedance models is studied

Ternary logic has become a promising alternative to traditional binary logic due to low power consumption and reduced circuits such as interconnects and chip areas. The efficiency of the multiplier circuit can be much better using a ternary logic system. Carbon nanotube field-effect transistor (CNTFET) is a promising technology as it achieves more advantages than MOSFET due to its low off-current

This paper proposes digital design and realization on Field-Programmable Gate Array (FPGA) of the Fractional-order (FO) delayed financial chaotic system. The system is solved numerically using the approximated Grünwald-Letnikov (GL) method. For the purpose of FPGA realization, the short memory principle and an approximate GL with limited window size are utilized. Lookup Tables (LUTs) are employed

The constant phase element (CPE) or fractional-order capacitor is an electrical device that has an impedance of the form Z(s)=1/Cαsα, where Cα is the CPE parameter and α is a fractional dispersion coefficient of values between 0 and 1. Here we show that in the time-domain the classical linear charge-voltage relationship of ideal capacitors, q=C·v, is not valid for CPEs. In fact the relationship is

Genetic algorithms (GAs) are intended to look for the optimum solution by eliminating the gene strings with the worst fitness. Hence, this paper proposes an optimized edge detection technique based on a genetic algorithm. A training dataset that consists of simple images and their corresponding optimal edge features is employed to obtain the optimum filter coefficients along with the optimum

This paper proposes voltage- and current-controlled universal memelements emulators. They are employed to realize the floating and grounded fractional-order memelements. The proposed emulators are implemented using different active blocks such as the second-generation current conveyor (CCII), Differential input double output transconductance amplifier (DOTA + ), balanced output CCII, and

This paper discusses the implementation sensitivity of chaotic systems added to their widely discussed sensitivities to initial conditions and parameter variation. This sensitivity can cause mismatches in some applications, which require an exact duplication of the system, e.g., chaos-based cryptography, synchronization and communication. Specifically, different implementation cases of three

This paper introduces a study for the effect of using different floating-point representations on the chaotic system's behaviour. Also, it offers a comparison between the attractors at three different orders, (integer, fractional, and mixed-order). This comparison shows the minimum number of bits needed for all parameters to simulate the chaotic attractor in each case. Numerical simulations using

In this paper, we discuss the optimal charging and discharging of supercapacitors to maximize the delivered energy by deploying the fractional and multivariate calculus of variations. We prove mathematically that the constant current is the optimal charging and discharging method under R s -CPE model of supercapacitors. The charging and round-trip efficiencies have been mathematically analyzed for