Prof. Ahmed Radwan

Different generalized filters topologies are proposed in the fractional-order domain. Three voltage-mode topologies and one current-mode topology are used to realize several types of fractional-order filters by applying different admittances combinations. The proposed topologies are designed using a single second-generation current conveyor (CCII-) and two fractional-order capacitors, which add

The paper proposes voltage-controlled first-and second-order memristor emulators. The emulators are designed using an operational-transconductance amplifier (OTA) and voltage multiplier blocks plus a fractional-order capacitor. The presented second-order emulator provides two pinched points controlled by order of the employed fractional-order capacitor. Numerical and PSPICE simulation results

The basic idea behind fractional calculus is that it considers derivatives and integrals of non-integer orders giving extra degrees of freedom and tuning knobs for modeling complex and memory dependent systems with compact descriptions. This paper reviews fractional calculus history, theory, and its applications in electrical engineering. The basic definitions of fractional calculus are presented

This paper presents a practical emulator of a generalised fractional-order model for gene regulation process, in an analog platform. The presented emulator is based on the second-generation current conveyor (CCII) and implemented using AD844 chips. The emulator realises a proposed generalised mathematical model for gene expression. The model sums up three different single models; the constitutive

This paper discusses the implementation sensitivity of chaotic systems added to their widely discussed sensitivities to initial conditions and parameter variation. This sensitivity can cause mismatches in some applications, which require an exact duplication of the system, e.g., chaos-based cryptography, synchronization and communication. Specifically, different implementation cases of three

This paper presents a novel lossless image encryption algorithm based on edge detection and generalized chaotic maps for key generation. Generalized chaotic maps, including the fractional-order, the delayed, and the Double-Humped logistic maps, are used to design the pseudo-random number key generator. The generalization parameters add extra degrees of freedom to the system and increase the

We propose a mathematical system capable of exhibiting chaos with a chaotic attractor which is odd symmetrical in the x − y phase plane but even symmetrical in the x − z and y − z phase planes respectively. A hardware implementation of the system is done on a digital FPGA platform for verification. The system is also attractive in the sense that (i) its dynamics are single-parameter controlled and

The efficiency of the hardware implementations of fractional-order systems heavily relies on the efficiency of realizing the fractional-order derivative operator. In this work, a generic hardware implementation of the fractional-order derivative based on the Grünwald–Letnikov’s approximation is proposed and verified on a field-programmable gate array. The main advantage of this particular

This paper introduces a new representation of the human brain neuron cell response. Implementation of a single cell model of an excitatory and inhibitory neuron. The architecture is based on mimic the real reaction of the neuron cell. Excitatory and inhibitory are implemented in generic form for all neuron's behavior. The design is tested experimentally using FPGA. The designs have been realized