Prof. Ahmed Radwan

This paper introduces the replacement of four and six resistors with four and six memristors at the same time for the modified single input Op-Amps oscillator. The full independency between the oscillation condition and the oscillation frequency facilitates the study. Mathematical analysis is provided for the double replacement of resistors with memristors. The whole range of operation of the

This paper introduces a step forward towards memristor-MOS hybrid circuit to achieve any combinational function. The proposed design is based on reducing the area by replacing the complete pull-down network with just one memristor and one comparator. The concept is then verified using an example of a simple function. Also, a proposed architecture for memristor based redundant multiplier circuit is

Mem-element based synaptic bridge is very promising topic due to its learning capability where the synaptic bridge can be build using either memristors or memcapacitors. In this paper, the detailed mathematical analysis of memcapacitor bridge circuit is introduced. This mathematical analysis is build when a current input signal is applied to excite the bridge. Closed form expressions for the

This paper presents an improved memristor-based relaxation oscillator which offers higher frequency and wider tunning range than the existing reactance-less oscillators. It also has the capability of operating on two positive supplies or alternatively a positive and negative supply. Furthermore, it has the advantage that it can be fully integrated on-chip providing an area-efficient solution. On

This paper introduces some generalized fundamentals for fractional-order RL β C α circuits as well as a gradient-based optimization technique in the frequency domain. One of the main advantages of the fractional-order design is that it increases the flexibility and degrees of freedom by means of the fractional parameters, which provide new fundamentals and can be used for better interpretation or

This paper presents a hardware implementation of a robust non-autonomous hyperchaotic-based PRNG driven by a 256-bit LFSR. The original chaotic output is post-processed using a novel technique based on the Fibonacci series, bitwise XOR, rotation, and feedback. The proposed post-processing technique preserves the throughput of the system and enhances the randomness in the output which is verified

This paper discusses the influence of the fractional order parameter on conventional chaotic systems. These fractional-order parameters increase the system degree of freedom allowing it to enter new domains and thus it can be used as a control for such dynamical systems. This paper investigates the behaviour of the equally-fractional-order Lü chaotic system when changing the fractional-order

Recently, conventional logistic maps have been used in different vital applications like modeling and security. However, unfortunately the conventional logistic maps can tolerate only one changeable parameter. In this paper, three different generalized logistic maps are introduced with arbitrary powers which can be reduced to the conventional logistic map. The added parameter (arbitrary power)

This paper presents a general synchronization technique and an amplitude modulation of chaotic generators. Conventional synchronization and antisynchronization are considered a very narrow subset from the proposed technique where the scale between the output response and the input response can be controlled via control functions and this scale may be either constant (positive, negative) or time