A novel digital comparator topology is presented. The proposed digital comparator cell uses transistors' ratio to program a fixed comparison level. A double-bound hysteretic control comparator, for DC-DC converters, is built using the proposed digital comparator cell. The hysteretic-band width variation, due to process effects, decreases with increased preamplifier stage gain and constitutes a

A new clock distribution technique is introduced in this paper. The technique avoids repeaters completely and distributes the clock directly on the passive interconnect network. The wires can be highly lossy, yet the clock is delivered with a very good shape and eye. The technique uses the characteristics of the interconnect to attenuate all frequency components equally. The resulting clock at the

Earthmoving operations represent a sizable work in heavy civil engineering projects. Selecting optimum fleet configuration for an earthmoving operation is a very difficult process, especially when dealing with a multi loader type and multi truck type configurations. This paper presents a framework that can be used for the selection of optimum fleet for earthmoving operations. It enables the user

We consider a primary link and a secondary link, each composed of a transmitter and a receiver. The primary channel and the channel between the secondary transmitter and the primary receiver follow a first-order Markov model for channel variation over time. Under this assumption of temporal correlation and via exploiting the channel state information (CSI) feedback, we pose the cognitive power

In Egypt, freight movement relies heavily on road transport. Commercial vehicles constitute a major segment of the vehicle population that travels the country's roads contributing to (and suffering from) daily congestion. Enhancing CV operations by minimizing their en-route travel times benefits both traffic network users as well as CV's business owners. The absence of traffic data collection

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A major portion of the power consumed in today's systems is due to the clock distribution network. Solutions attempted to reduce clocking power result in low efficiency systems or systems with high complexity control schemes. In this work, a low power clock generator is introduced that can reduce switching power of the clock by almost 75%. This circuit uses the charge recycling concept to achieve

Multi-core and many-core Systems-on-Chip (SoC) are growing more complex than ever. Consequently, developing system models for such SoCs to guide and validate architectural and implementation decisions is becoming a daunting task. It consumes a huge amount of time and effort just to get the model up and running. Although these system models can be fairly abstracted, they still require the setup of

We consider a multiple access primary network with N transmitters. A secondary link of one transmitter and a corresponding receiver causes interference to the primary network. An achievable rate region for the primary network and the secondary link is obtained given the following mode of operation. The secondary transmitter employs rate-splitting so that the primary receiver can decode part of the

Pipelines conveying gas under pressure exhibit turbulence-induced vibrations. The current work is concerned with extracting useful power from pipelines operating well within their stability region. At such regions, the pipe vibrations exist in small magnitudes and are unlikely to cause structural failure, yet can be exploited to provide useful energy for low-power electronic devices. Accordingly